1. Field of the Invention
This invention relates generally to the fabrication of multilayer thick film interconnect circuit boards, and more particularly to a novel process for achieving improved electrical isolation and dimensional stability in these circuits and circuits produced by this process.
2. Related Art An interconnect circuit board is generally defined as the physical realization of electronic circuits or subsystems from a number of extremely small circuit elements electrically and mechanically interconnected on a substrate. Thick film circuits are fabricated by screen printing and firing conductive, resistive and insulating components onto a ceramic substrate to which active devices are then attached. It is frequently desirable to combine these diverse type electronic components in an arrangement so that they may be physically isolated and mounted adjacent one another in a single package and electrically connected to each other and/or to common connections extending from the package. These common connections may, for example, consist of predefined conductive patterns deposited on a common substrate, where the substrate also serves as a common supporting member for all electronic components and interconnections in the package. Thus, it also frequently becomes necessary to provide a medium for electrically isolating adjacent portions of the conductive pattern or patterns on the substrate from one another as well as isolating these patterns from the electronic components mounted above the substrate.
These components may, for example, be integrated circuits, discrete semiconductor devices, and other passive components such as resistors and capacitors.
A conventional approach to providing this above-described electrical isolation is to use some insulating medium to surround and electrically isolate the conductive pattern on the substrate and also to support and electrically isolate the above-substrate electronic components. One method for achieving such electrical isolation is the so-called thick film process wherein individual conductor and dielectric compositions in paste form are sequentially deposited on insulating substrates and then fired, one layer of material at a time, in order to build up a thick film, multilayer circuit. A common method for depositing these thick film pastes involves the use of a screen printing process for depositing layers of a dielectric paste on the substrate surface and over any conductive patterns thereon and then sequentially firing the layers at a predetermined elevated temperature in order to build up a "thick film" of a preferred thickness.
This prior art thick film process has been employed to maintain good fixed registration (position accuracy) and dimensional stability of the film in the x and y lateral directions as a result of being fired directly on the substrate and thus being positionally secured and permanently referenced to the substrate. However, a disadvantage of this thick film process is that voids can be formed in the thick film dielectric material during the sequential printing and firing process. As a consequence, these voids often produce undesirable holes, cavities or other structural nonuniformities in the completed dielectric thick film layer that can result in shorting between the conductor layers of the circuit. Additionally, when vias are created in the thick film dielectric, flow of dielectric material at the edge of the openings causes the vias to be reduced on site and thus limits the minimum dimension of vias produced by this process.
Another disadvantage of this thick film prior art approach is that the requirement for building up many multiple thick film layers in the more complex hybrid circuits results in an expensive process due to the number of individual processing steps involved.
A third disadvantage of the thick film prior art approach is that the top bonding conductor traces are typically rough and/or rounded as a result of being printed over numerous levels of conductor and dielectric. This geometry or surface topography can reduce the reliability of secondary interconnections, such as wire bonds, made to the surface so treated.
Another prior art approach to the fabrication of hybrid microcircuits is the cofired ceramic process. This technology utilizes dielectric material formed into sheets which are known in the art as "green tape". These sheets of green tape are then either metallized to make a ground plane, signal plane, bonding plane, or the like, or they are formed with via holes and back filled with metallization to form insulating layers. Individual sheets of this green tape are then stacked on each other, laminated together using a chosen temperature and pressure, and then fired at a desired elevated temperature. When alumina is chosen for the insulating material, tungsten, molybdenum or molymanganese is typically used for metallization, and the part is fired to about 1,600.degree. C. in a H.sub.2 reducing atmosphere.
One disadvantage of this cofired ceramic approach is that the dielectric film or tape will undergo shrinkage of as much as 20% in each of the X, Y and Z directions. This shrinkage results in a dimensional uncertainty in the fired part of typically 1%. This type of dimensional instability is unacceptable in the fabrication of many types of hybrid circuits, particularly large complex custom circuits used in tightly toleranced military applications.